Jiawei Zhang

TFTs for Display  

318 3B Building, Software Campus, Shandong University, Jinan, Shandong

Email: Jiawei.zhang@email.sdu.edu.cn

Biography

Jiawei Zhang received his BSc degree in Physics at Shanghai Jiao Tong University in 2010, followed by MSc and PhD degrees at the University of Manchester in 2012 and 2016. He worked in the School of Electrical and Electronic Engineering, University of Manchester and National Graphene Institute for 3 years. In 2019, he became a professor with the School of Microelectronics, Shandong University. His research interests include oxide semiconductors, thin-film transistors, printable electronics, microwave/THz electronics and 2D materials. He has published over 50 scientific papers in journals including Nature Communications, PNAS, Nano Letters, IEEE Electron Device Letters, etc.

Abstract for Presentation

A Thin-Film Transistor with No Apparent Channel for High Aperture Ratio Pixel Architectures

As one of the drivers of the technology revolutions that have shaped the modern world, the scaling of transistors has garnered a great deal of attention in recent decades. Vast research efforts are currently focused on scaling down thin-film transistors (TFTs), devices which form a pillar of modern display technology and will inevitably find use in wearable electronics and medical devices. Efforts to reduce TFT dimensions have been frustrated by so-called short-channel effects, but unlike silicon-based transistors, the dimensions of contemporary TFTs are a long way from reaching their physical limits.

In this work, a TFT design with a working principle dependent upon the depleting properties of a Schottky source electrode is introduced [1]. Such design takes a drastic departure from standard transistor structures by removing the need for a semiconducting channel. Remarkably, these transistors have their source and drain electrodes in direct contact, thereby enabling aggressive scaling to smaller dimensions. As an example application, a more compact pixel architecture for realizing high-resolution displays is proposed, which reduces the opaque transistor area by two-thirds and thereby enables huge improvements in brightness, image quality and power consumption (~80%) when compared to architectures based on conventional TFTs [2].

References

[1] J. Zhang*, J. Wilson*, G. Auton, Y. Wang, M, Xu, Q. Xin, A. Song, PNAS., 116(11) (2019) 4843.

[2] J. Wilson*, J. Zhang*, A. Song, J Soc Inf Display., (2022) 1-10.